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PR2003 225206 CGY887 MPC74 4735A 5KP30A E26ZBD LTC3406B
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 plerowTM APL1685
PLL Module
Features
* 4 dBm Output Level at 1685 MHz * Channel Step Size: 100 kHz *2
nd
Description
The plerowTM PLL synthesizer module was designed for use in wireless and wireline systems in a wide range of frequency from 50 MHz to 6 GHz. ASB's PLL provides exceptionally low spurious and phase noise performance with fast locking time and low current consumption. All products are available in a surface-mount type package.
Harmonic:
< -20 dBc
* Spurious Level: < -70 dBc * Current Consumption: < 35 mA
Specifications
Parameter Frequency Range Output Power Supply Voltage Current Consumption Channel Step Size 2 Harmonics Spurious Level Reference Frequency Reference Input Level Phase Noise (C / N) @ 1 kHz @ 10 kHz @ 100 kHz Output Impedance Operating Temp. Range Package Type & Size C mm -30 dBc/Hz -73 -101 -119 50 25 SMT, 19.0Wx19.0Lx5.8H 80 -67 -95 -115
nd
Unit MHz dBm V mA kHz dBc dBc MHz dBm
Min. 1645 2 4.8
Typical 1685 4 5.0 25 100 -25 -75 10
Max. 1725 6 5.2 35 -20 -70 5
More Information
Website: www.asb.co.kr E-mail: sales@asb.co.kr Tel: (82) 42-528-7220 Fax: (82) 42-528-7222 ASB Inc., 4th Fl. Venture Town Bldg., 367-17 Goijeong-Dong, Seo-Gu, Daejon 302-716, Korea
0
2
1) Measurement conditions are as follows: T = 25C, VCC = 5 V, Freq. = 1685 MHz, 50 ohm system.
Outline Drawing
1/2
www.asb.co.kr
May 2009
plerowTM APL1685
PLL Module
Dimension (UNIT: ) A 19.00.1 B 5.5 C 5.8 D 2.03 E 0.51 F 1.35 G 0.45 H 17.0 I 16.3 J 15.75 K 2.0 L 20.6 M 1.52 N 2.03 O 8.0
Pin Out for PLL (All other Pins are Grounded) Pin No. 1 2 3 4 Application CLOCK DATA ENABLE OSC IN Pin No. 9 13 15 16 Application VCC(VCO) RF OUT VCP(PLL) LOCK DETECT
2/2
www.asb.co.kr
May 2009


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